Principal Engineer, SOC Design

Onsite San Jose, California, United States

dram design lab (ddl)

greenhouse

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Job description

Join a team focused on developing silicon solutions for memory and storage technology. Work on enhancing memory capabilities for emerging applications in a collaborative environment.

Details

San Jose, California, onsite work
$219,000—$351,000 USD salary
20+ years of experience required

The work

Participate in architectural definitions and micro architecture of subsystems
Responsible for top integration, logic design, and RTL implementation
Review and integrate 3rd party IPs including ARM cores and DDR controllers
Collaborate with architects and verification engineers for SoC design